A multi-operand adder circuit design using novel multi-valued current mode design technique

dc.contributor.authorÇini U.
dc.contributor.authorMorgül A.
dc.date.accessioned2024-03-13T10:00:57Z
dc.date.available2024-03-13T10:00:57Z
dc.date.issued2009
dc.departmentİstanbul Beykent Üniversitesien_US
dc.description6th International Conference on Electrical and Electronics Engineering, ELECO 2009 -- 5 November 2009 through 8 November 2009 -- Bursa -- 79288en_US
dc.description.abstractMulti-operand adders are important arithmetic design blocks especially in the addition of partial products of hardware multipliers. In this paper, a current mode circuit proposed for addition of seven inputs, namely, (7,3) counter. Input operands are added up using current mode multi-valued signals with three bit output. The circuit is designed using 0.18 ?m technology and simulated using HSPICE. The results show that our design consumes less power at high frequencies compared to standard CMOS implementation. The current consumption in the circuit is constant; as a result an analog friendly design is accomplished since it does not produce significant switching noise. The circuit can be used for multipliers, FIR Filters and similar signal processing blocks. The design is especially advantageous for the mixed signal design environment.en_US
dc.identifier.endpageII53en_US
dc.identifier.isbn9789944898188
dc.identifier.scopus2-s2.0-76249129589
dc.identifier.scopusqualityN/Aen_US
dc.identifier.startpageII49en_US
dc.identifier.urihttps://hdl.handle.net/20.500.12662/2887
dc.indekslendigikaynakScopus
dc.language.isoenen_US
dc.relation.ispartofELECO 2009 - 6th International Conference on Electrical and Electronics Engineeringen_US
dc.relation.publicationcategoryKonferans Öğesi - Uluslararası - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/closedAccessen_US
dc.titleA multi-operand adder circuit design using novel multi-valued current mode design techniqueen_US
dc.typeConference Objecten_US

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