CMOS Negative Impedance Converter Circuit with the Elimination of Parasitic Gate-Source Capacitance
dc.contributor.author | Durukan S. | |
dc.contributor.author | Palamutcuogullari O. | |
dc.contributor.author | Yilmaz A.E. | |
dc.date.accessioned | 2024-03-13T10:00:55Z | |
dc.date.available | 2024-03-13T10:00:55Z | |
dc.date.issued | 2022 | |
dc.department | İstanbul Beykent Üniversitesi | en_US |
dc.description | 21st Mediterranean Microwave Symposium, MMS 2021 -- 9 May 2022 through 13 May 2022 -- -- 181096 | en_US |
dc.description.abstract | A CMOS negative impedance converter (NIC) circuit with the cross-coupled topology is designed to generate negative resistance/capacitance/inductance in the frequency range between 100 MHz and 3 GHz. The proposed NIC circuit can cancel the parasitic gate-source capacitances of NMOS transistors which are the core elements of this type of topology. The negative impedance conversion capability of the circuit is shown analytically. It is also verified in AWR Design Environment using BSIM3 and BiCMOS transistor models comparatively. The circuit is tested with the loads 50O resistance, 5 pF capacitance and 10 nH inductance. The results show that the performance of the proposed NIC circuit is satisfactory and close to its theoretical values. © 2022 IEEE. | en_US |
dc.description.sponsorship | 21L0443007; Ankara Universitesi | en_US |
dc.description.sponsorship | Ankara University, Scientific Research Projects Department. Project No: 21L0443007. | en_US |
dc.description.sponsorship | The authors would like to thank Scientific Research Projects Department of Ankara University that supported this work with the project no 21L0443007. | en_US |
dc.identifier.doi | 10.1109/MMS55062.2022.9825545 | |
dc.identifier.isbn | 9781665471107 | |
dc.identifier.issn | 2157-9822 | |
dc.identifier.scopus | 2-s2.0-85135187861 | en_US |
dc.identifier.scopusquality | N/A | en_US |
dc.identifier.uri | https://doi.org/10.1109/MMS55062.2022.9825545 | |
dc.identifier.uri | https://hdl.handle.net/20.500.12662/2861 | |
dc.identifier.volume | 2022-May | en_US |
dc.indekslendigikaynak | Scopus | en_US |
dc.language.iso | en | en_US |
dc.publisher | IEEE Computer Society | en_US |
dc.relation.ispartof | Mediterranean Microwave Symposium | en_US |
dc.relation.publicationcategory | Konferans Öğesi - Uluslararası - Kurum Öğretim Elemanı | en_US |
dc.rights | info:eu-repo/semantics/closedAccess | en_US |
dc.subject | CMOS | en_US |
dc.subject | cross-coupled pair | en_US |
dc.subject | matching | en_US |
dc.subject | Negative impedance | en_US |
dc.subject | Non-Foster | en_US |
dc.title | CMOS Negative Impedance Converter Circuit with the Elimination of Parasitic Gate-Source Capacitance | en_US |
dc.type | Conference Object | en_US |